Electric actuator unction test

The electric actuator features a technology unction, allowing the operator to program the actuator to lock in one of four positions if there is a loss of power. "If the actuator was halfway open and you lost power, it would close or open, depending on how it's technologyly calibrated," Kundin said.

Valves and actuators are critical in almost every aspect of single board computer. They are used in a wide range of applications, including pollution control, feed water, cooling water, chemical treatment, bottom ash and steam turbine control embedded systems. They are exposed to a variety of chemicals, abrasive materials and very high temperatures. They are critical in optimizing efficiency, and they are often the final control element in the operation of a power plant.

Although the basic technology for most valves and actuators has remained unchanged, innovative applications and design modifications for problem solving have led to notable improvements in actuator technology. These improvements can reduce costs by supporting the control valve's ability to throttle accurately, thereby providing better performance for high-pressure steam bypass, turbine bypass and other critical power plant operations. Actuators regulate mass and energy flows by adjusting valves, flaps and cocks.

refer to: http://www.power-eng.com/articles/print/volume-117/issue-8/features/opportunities-to-improve-efficiency.html

Info furim announment

German based Lauterbach is recognised for both engineering excellence and exceptional embedded computer technical support. The quality and capability of Lauterbach tools enable engineers to develop robust code whilst minimising development time lost to debugging. They have become a favourite with many hi-tech engineers, supporting more than 3500 microprocessors and all known ARM Cores; covering products from over 75 silicon embedded computer companies.

refer to: http://embedded-computing.com/news/lauterbach-software-debugging-workshops/

What shapes the global in-vehicle market?

Today, several proprietary radios enable keyless entry and proximity sensor capabilities to unlock car doors or start the ignition. But because these links are not based on standards, each accessory must be compatible with the specific proprietary technology or it will not work. Wireless SoCs that include Bluetooth Low Energy (LE) capabilities, however, enable interoperability with all in-vehicle wireless systems, allowing consumers to use any of their mobile accessories to open car doors or start the ignition. The Bluetooth SIG has specified a standard mechanism for streaming high-quality mono or stereo audio from a Bluetooth master such as a smartphone to a slave device like an IVI system. The Advanced Audio Distribution Profile (A2DP) encodes 2-channel audio in a Bluetooth-friendly format, which is sent wirelessly and decoded at the Bluetooth receiver. The SBC audio codec is a mandatory component of the A2DP profile, but other industry standards and proprietary codecs can also be accommodated. The dashboard so they can answer calls and check text messages.

refer to: http://embedded-computing.com/articles/wireless-accelerate-next-wave-in-vehicle-innovation/

About Manage risk in Java

When it comes to software development, the old adage is best spun in a slightly different way: better "early" than never. Accordingly, static analysis can help those developing in Java to stay one step ahead of potential coding problems.

Today’s software development teams are under immense pressure; the market demands high-quality, secure releases at a constantly increasing pace while security threats become more and more sophisticated. Considering the high cost of product failures and security breaches, it is more important than ever to address these risks throughout the software development process. Potential problems need to be spotted early to prevent release delays or, worse, post-release failures. Fortunately, there are numerous tools to help developers manage these risks, helping to identify potential problems early in the development phase when issues are less disruptive and easier to fix. They are readily accessible to developers and easy to use within many development environments. This applies to developers programming in any language; however, we focus on Java in this discussion (see Sidebar 1).
...
refer to: http://embedded-computing.com/articles/static-helps-manage-risk-java/

FPGAs have become some of the most important drivers for development

FPGAs have become some of the most important drivers for development of leading edge semiconductor technology. The complexity of programmable devices, and their integration of diverse high-performance functions, provides excellent vehicles for testing new processes. It’s no accident that Intel has selected Achronix and Tabula, both makers of programmable devices, as the only partners that have been granted access to their 22 nm 3D Tri-Gate (FinFET) process. In February, Intel also announced an agreement with Altera, which will enable the company to manufacture FPGAs using their next-generation 14 nm Tri-Gate process.

In parallel with driving manufacturing, FPGA technology development must also include enhancements to design tools and flows. As vendors strive to make their devices more SoC- and ASIC-like, they are also adopting standards and collaborating with EDA companies to integrate their tools more seamlessly. These collaborations are producing great benefits for designers, as FPGA design methodologies are leading the way in areas that the EDA industry has long been promising new capabilities, such as in Electronic System Level (ESL) synthesis, IP integration and re-use, and higher-level tools for software/hardware co-design.

FPGA design methodologies have long integrated EDA point tools, such as simulation and PCB design, into FPGA vendor’s design platforms. Now, vendors such as Synopsys, with their Synplicity tools, and Xilinx with Vivado, are collaborating to build more complete integrated top-to-bottom flows. To address the greater complexity of FPGAs that may now contain up to two million equivalent logic cells, Synopsys has added Hierarchical Project Management (HPM) to Synplicity. HPM supports distributed design teams and parallel development, enabling partitioning of RTL and sharing of design debug tasks. Xilinx has adopted the industry-standard Synopsys Design Constraint (SDC) timing constraints (to replace Xilinx proprietary UDC) in a design flow that can be driven from standard Verilog HDL.

1.EASING IP INTEGRATION

Easier integration and re-use of semiconductor IP, especially when sourcing from multiple vendors, has been one of the greatest challenges to SoC designers and EDA tool flows. With the advent of higher capacity FPGA-based SoCs that utilize embedded ARM cores, those same challenges are now extended to the world of FPGA design....

2.INDUSTRY STANDARDS ENABLE HIGHER LEVELS OF ABSTRACTION

Building on their 2011 acquisition of AutoESL, Xilinx also says that they have expanded their C/C++ system-level design library for High-Level Synthesis (HLS) in the new Vivado release. Xilinx is targeting the growing market for embedded vision applications, following on their participation as a founding member of the Embedded Vision Alliance, with support for industry standard floating point math.h operations and real-time video processing functions. Designers of embedded vision systems will be able to utilize Vivado HLS integrated with the Open Source Computer Vision Library provided by the OpenCV organization. OpenCV is an open source BSD-licensed library of computer vision functions, which supports Windows,Linux, Mac, Android and Apple iOS operating systems. Vivado users will be able to develop embedded vision applications for the dual-core ARM Cortex A9 processor system in Zynq FPGAs, augmented with special-purpose hardware accelerators built in the programmable logic fabric....

3.THE FUTURE OF FPGAS

 Advances in FPGA tools and flows are good news for designers of programmable logic systems as well as ASIC and SoC designers. At a recent Synopsys User Group tutorial on the Synplicity-Vivado flow, the large majority of attendees were involved in FPGA prototyping, where the latest high-capacity FPGAs have become critical tools for design validation and signoff for complex SoCs. By utilizing the same design languages and standards for both ASIC and FPGA design, much duplication of effort can be eliminated and faster time-to-market will result.

...

refer to :
http://dsp-fpga.com/articles/advances-in-eda-design-methodologies-led-by-next-generation-fpgas/

Simplifying the burden of AFE designs

The AFE is a critical, yet sometimes underappreciated component to a sensor system. The typical discrete approach of adding op-amps and filters, and trial-and-error soldering of resistors is not efficient and the cost of time in debugging and development easily outweighs the cost of adding an intelligent, MCU-based configurable AFE. But not all configurable AFEs are built the same. So, it is important to consider the flexibility and scalability of the AFE to support embedded types of sensors, and the intelligence to adjust “on the fly” or in the field. Simple, easy-to-use software tools can ease this process and can be embedded by even the non-analog experts on the team.

refer to:http://embedded-computing.com/articles/latest-afe-simplifies-interfacing-hundreds-sensors/#at_pco=cfd-1.0

COM cases show longer medical device life expectancy

 

Like many other industries, health care has become much more agile as practitioners have tried to keep expenses under control. Smaller, more portable devices now enable more efficient and economical diagnostic and treatment procedures to be delivered at the patient’s bedside. Computers-On-Modules (COMs) are helping provide the portability, computing power, and integration needed to increase the longevity of medical device designs.

 

Electronic device manufacturers are increasingly using Computers-On-Modules (COMs) to produce compact, portable, and easily modified solutions for health care. In addition to smaller solutions, COMs enable longer product life, which is particularly desirable in medical equipment. One reason for this is the stringent and expensive certification process medical devices go through as mandated by the FDA. Furthermore, successful products often become industry standards that medical technicians must learn and adhere to.
By definition, COM designs are modular. The COM approach for embedded technology enables a medical solution’s processing power to be easily updated or upgraded while the physical dimensions and mounting system remain exactly the same. This allows the appearance of the industrial design to stay consistent with market expectations while providing for any needed upgrades. If a particular processor is reaching End-Of-Life (EOL), a module with a current processor can be introduced.
With COMs, the processor and supporting features are placed on a compact module that comprises a complete computer. The I/O for the system and the unique features that differentiate the customer’s product are included on a separate baseboard. Processor upgrades can be made by utilizing different processing modules that mate with the baseboard. This enables easy processor upgrades, plus various modules can be offered spanning a range of performance levels.

Other benefits of COM use in medical device designs include:

1.Fast time time to market

2.Simplified development

3.Easy modification of popular products

4.Easier life-cycle extension

Many medical devices are cart-based to provide point-of-care diagnosis and treatment. COMs with the latest processors and features such as onboard graphics and GbE LAN capability enable fast transmission to remote terminals or centralized storage. LAN capabilities and standard x86-based solutions help meet the need for information integration with centralized patient records, a key concern in health care.

refer:
http://embedded-computing.com/articles/com-device-life-expectancy/

The embedded world Exhibition&Conference

The international embedded community meets for three days at its annual highlight in Nürnberg from 26–28 February – the embedded world Exhibition&Conference. The exhibition has been the main hub of one of the most dynamic and highly specialized technology sectors for over 10 years. It is the world’s biggest international exhibition and conference event on embedded system technology.

 

embedded world has been the most important event in the international exhibition calendar for both exhibitors and visitors for a decade.

It is also the world’s biggest special-interest exhibition for embedded technologies.

 

Acrosser technology  ---------------->Booth Hall 2 2-519

 

 

refer http://www.embedded-world.de/en/press/pressreleases/

The Intel® Atom™ processor is designed to keep you moving

The Intel® Atom™ processor is designed to keep you moving, whether it’s in a smartphone, embedded application, tablet or microserver.

With an Intel® Atom™ processor-based tablet, you’re going to have one of the lightest tablets around. And you won’t sacrifice performance at all.


 With lead-free and halogen-free manufacturing, the Intel® Atom™ processor is also an environmentally responsible choice.

from
1.http://www.intel.com/content/www/us/en/processors/atom/atom-processor-details.html?wapkw=atom
2.http://ark.intel.com/products/49490

Industrial and commercial embedded computing devices that require ultra low power consumption

With its signature fanless operation, the VIA Eden™ processor family targets personal, business, industrial and commercial embedded computing devices that require ultra low power consumption, rock solid reliability and compatibility with standard x86 operating systems and software applications.
VIA Eden processors are scalable from 400MHz to 1.5GHz all within a maximum thermal envelope of 7.5 watts, and are available with a diverse range of feature sets that enable PC functionality and connectivity from traditionally single function devices.

Process Technology	Processor Name	Core Architecture	Clock Speed Range	FSB	Package/ Size
90nm	VIA Eden	'Esther'	400MHz-1.2GHz	400MHz	NanoBGA2 21mmx21mm
90nm	VIA Eden ULV	'Esther'	1.0GHz, 1.5GHz	400MHz	NanoBGA2 21mmx21mm
0.13um	VIA Eden-N	'Nehemiah'	533MHz-1.0GHz	133MHz	NanoBGA 15mmx15mm
0.13um	VIA Eden ESP	'Nehemiah'	667MHz-1.0GHz	133MHz	EBGA 35mmx35mm
0.15um	VIA Eden ESP	'Samuel 2'	300MHz-600MHz	66/ 100/ 133MHz	EBGA

from
http://www.via.com.tw/en/products/processors/eden/